[Clp] skylake xeons and AVX-512

Julian Hall jajhall at ed.ac.uk
Sat Feb 25 10:15:22 EST 2017


Dear Jesse

It is very hard to exploit parallelism within the simplex method for 
general large scale sparse LP problems: many have tried over the years 
(including me on-and-off for 20 years). You can't just "vectorize". Clp 
in particular is a serial code unless you invoke Aboca, see

http://www.fastercoin.com/f2_files/naqs.html

Although it's the work of my student, I believe that the state of the 
art in parallel simplex for such general LP problems is

http://www.maths.ed.ac.uk/hall/HuHa13/

This was culmination of three years work for someone who is good enough 
to be now managing the world's best simplex solver.

That said, if you do manage to get some improved performance out of 
these new architectures, I'll be the first of many wanting to know how!

All the best,

Julian


> I would be interested in benchmarks. I have been able to explicitly
> vectorize my old codes with Intel Intrinsics guide (see
> https://software.intel.com/sites/landingpage/IntrinsicsGuide/) and the
> performance gains have been quite nice and it seems CLP would be a good
> candidate for such optimizations. I would like to know that build flags
> are needed to get every drop of performance out of these new architectures.
>
> Cheers,
> Jesse
>
> On Sat, Feb 25, 2017 at 1:04 PM, David Prime <david at primefarm.co.uk
> <mailto:david at primefarm.co.uk>> wrote:
>
>     Hi all,
>
>     With the release of the new Xeon Skylake CPUs imminent and google
>     compute cloud offering early access to servers running them, I'm
>     wondering if there's any pre existing work or thoughts on how CLP
>     performs with these extra SIMD extensions?
>
>     I'm planning to get hold of a few servers as soon as I can and
>     compile the lib with various compilers/settings and see if there are
>     any nice automatic optimisations to be had. I'll share any
>     benchmarks I generate and maybe we can see if there's any further
>     room for optimisation on these new architectures.
>
>     Are there any clp specific build flags to enable/disable certain
>     features that could be relevant here?
>
>     Cheers,
>     David
>
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Julian Hall (Postgraduate Taught Programme Coordinator - Operational 
Research MSc Programme Director)
-- 
Dr. J. A. Julian Hall, Senior Lecturer, School of Mathematics,
University of Edinburgh, James Clerk Maxwell Building,
Peter Guthrie Tait Road, EDINBURGH, EH9 3FD, UK.
Room: 6221   Phone: [+44](131) 650 5075   Email: J.A.J.Hall at ed.ac.uk
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